钱钦松简介

发布者:周星竹发布时间:2019-02-23浏览次数:3544

基本资料

·姓名: 钱钦松

·性别: 男

·出生年月: 1983.9

·民族: 汉

·职称: 副教授

·学历: 博士

·职务:教师

·联系电话: 025-83795811

·E- mail qianqinsong@seu.edu.cn

个人简历

钱钦松,副教授,硕士生导师。2012年留校工作,主要从事功率集成电路与系统的拓扑、环路控制与可靠性等方面的教学与研究工作。先后主持国家/江苏省自然基金、国家/江苏省重点研发项目等纵向项目6项,主持与企业横向合作项目5项;参加国家核高基重大专项、国家“863”项目、国家自然科学基金、江苏省项目以及其他科研合作项目10余项;获2014教育部技术发明一等奖一项(第三完成人),获2014江苏省优秀博士论文一篇;在IEEE Trans. on Electron DevicesIEEE Trans. on Power Electronics等在国内外核心刊物和国际重要学术会议上发表论SCIEI收录论文40余篇(其中第一作者18篇);获中国发明专利授权71项(其中第一发明人专利授权29项),获美国授权专利3项。

  

  

  

  

  

  

【 研究方向

功率集成电路与系统的拓扑、环路控制与可靠性,基于GaN/SiC等第三代半导体器件的高功率密度开关变换器研究等。

  

  

  

  

  

  

  

  

研究成果

[1]Qian Q, Zhang T, Sun W, et al. Impact of stray  inductances of the power loop on false trigger-on in the  zero-voltage-switching full-bridge converter[J]. International Journal of  Circuit Theory & Applications, 2017, 45(3):392-406.

[2]Qian Q, Sun W, Zhang T, et al. A Voltage-fed  Single-stage PFC Full-bridge Converter with Asymmetric Phase-shifted Control  for Battery Chargers[J]. Journal of Power Electronics, 2017, 17(1):31-40.

[3]Qian Q, Sun W, Yu J. Fast switch fault diagnosis for  PWM DC–DC low power converters[J]. Ieej Transactions on Electrical &  Electronic Engineering, 2017, 12(5).

[4]Qian Q, Yu J, Su C, et al. A LLC resonant converter  with dual resonant frequency for high light load efficiency[J]. International  Journal of Electronics, 2017.

[5]Qian Q, Yu J, Zhu J, et al. Isolated gate driver for  SiC MOSFETs with constant negative off voltage[C]// Applied Power Electronics  Conference and Exposition. IEEE, 2017:1990-1993.

[6]Qian Q, Liu S, Sun W, et al. A Robust W-Shape-Buffer  LIGBT Device With Large Current Capability[J]. IEEE Transactions on Power  Electronics, 2014, 29(9):4466-4469.

[7]Qian Q, Huang T, Liu S, et al. Linear Drain Current  Degradation of FG-pLEDMOS Transistor Under Pulse Gate Stress With Different  Rising and Falling Edges[J]. IEEE Transactions on Device & Materials  Reliability, 2014, 14(1):229-233.

[8]Qian Q, Sun W, Wei S, et al. The Investigation of  Electrothermal Characteristics of High-Voltage Lateral IGBT for ESD Protection[J].  IEEE Transactions on Device & Materials Reliability, 2012, 12(1):146-151.

[9]Qian Q, Liu S, Wan W, et al. Reliability Concern on  Extended E-SOA of SOI Power Devices With P-Sink Structures[J]. IEEE  Transactions on Device & Materials Reliability, 2013, 13(1):161-166.

[10]Qian Q, Sun W, Liu S, et al. Linear drain current  degradations of FG-pLEDMOS transistor under different AC stress  conditions[J].2012, 7(2):303-306.

[11]Qian Q, Sun W, Han D, et al. The optimization of deep  trench isolation structure for high voltage devices on SOI substrate[J].  Solid-State Electronics, 2011, 63(1):154-157.

[12]Qian Q, Sun W, Zhu J, et al. Investigation of the shift  of hot spot in lateral diffused LDMOS under ESD conditions[J].  Microelectronics Reliability, 2010, 50(12):1935-1941.

[13]Qian Q, Sun W, Zhu J, et al. A Novel Charge-Imbalance  Termination for Trench Superjunction VDMOS[J]. IEEE Electron Device Letters,  2010, 31(12):1434-1436.

[14]Qian Q, Sun W, Liu S, et al. Novel Hot-Carrier  Degradation Mechanisms in the Lateral Insulated-Gate Bipolar Transistor on  SOI Substrate[J]. IEEE Transactions on Electron Devices, 2011,  58(4):1158-1163.

[15]Qian Q, Sun W, Liu S, et al. Linear drain current  degradations of FG-pLEDMOS transistor under different AC stress  conditions[C]// International Symposium on Power Semiconductor Devices and  ICS. IEEE, 2012:303-306.

[16]Qian Q, Sun W, Li H, et al. Reliability investigations  and improvements of the pLEDMOS for PDP data driver ICs[J]. Semiconductor  Science Technology, 2011, 26(5):055001.