刘波简介

发布者:谭乔元发布时间:2022-07-25浏览次数:10

个 人 简 历

  

基本资料

 ·姓名: 刘波

 ·性别: 男

 ·出生年月: 1984.04

 ·民族: 汉

 ·职称: 副教授

 ·学历: 博士

 ·职务:

 ·联系电话:

·E- mail liubo_cnasic@seu.edu.cn

 

个人简历


东南大学电子科学与工程学院,副教授,硕导,主要研究方向为高效能智能计算架构与电路设计。先后负责国家自然科学基金1项、国家科技重大专项1项,承担企业技术研发合作项目3项;并参与多项国家自然科学基金、863重点项目等国家级科研课题。作为技术骨干参与十一五、十二五863高能效计算架构与电路设计相关科研攻关项目,负责其中部分关键技术的研发,项目成果获2014年教育部技术发明一等奖、2015年国家技术发明二等奖。近5年,发表20余篇国际知名期刊和会议论文,包括IEEE TCAS-I(电路与系统Top期刊)TCAS-IITEDTVLSIIEEE Circuits and Systems Magazine(本校第一篇Feature Paper)IEEE Design & TestMicroelectronics Journal、中国科学:信息科学(英文版)SCI期刊,以及DATE(EDA Top会议之一)ISCASGLSVLSIFPTDSP等国际会议论文;作为第一发明人,获国家发明专利授权20余项、美国专利授权1项,申请发明专利30余项,国际专利4项。作为指导老师获得多个设计竞赛奖项,包括:20202021连续两年全国集成电路创新创业大赛全国总决赛一等奖,2021年全国大学生嵌入式芯片与系统设计竞赛全国总决赛一等奖,2020年“华为杯”创芯大赛全国总决赛二等奖,2018全国大学生FPGA创新设计邀请赛一等奖等。还获得了首届中国电子信息行业创新创业大赛总决赛优秀奖(2020)、首届集成电路产业设计大赛总决赛二等奖(2020)等微电子及集成电路领域设计大奖。担任本科课程“VLSI系统导论”(2014年起)和“集成电路综合课程设计” (2022年起)、研究生课程“数字集成电路设计”和“数字集成电路EDA技术”(2015年起)的教学工作;获东南大学中泰国立奖教金(2019),华为奖教金(2020)2019年、2020年连续两年东南大学优秀教师。


【 研究方向


数字集成电路设计,高能效智能计算电路与系统,及相关VLSI设计。



研究成果


期刊和会议论文发表(近3年,selected

期刊:

 [1] Y. Gong, H. Cai, H. Wu, W. Ge, H. Yan, Z. Wang, L. Shi, B. Liu, Quality Driven Systematic Approximation for Binary-Weight Neural Network Deployment, in IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 69, no. 7, pp. 2928-2940, 2022.

 [2] B. Liu, M. Liu, Y. Zhou, X. Hong, H. Cai, Lirida Alves de Barros Naviner, Writing-only In-MRAM Computing Paradigm for Ultra-low Power Applications, Microprocessors and Microsystems, vol. 90, pp. 104449, 2022.

 [3] H. Cai, Y. Guo, B. Liu, M. Zhou, J. Chen, X. Liu, J. Yang, Proposal of Analog In-Memory Computing With Magnified Tunnel Magnetoresistance Ratio and Universal STT-MRAM Cell, in IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 69, no. 4, pp. 1519-1531, 2022.

 [4] B. Liu, H. Cai, Z. Zhang, X. Ding, Z. Wang, Y. Gong, W. Liu, J.J. Yang, Z. Wang, J. Yang, More is Less: Domain-specific Speech Recognition Microprocessor Using One-dimensional Convolutional Recurrent Neural Network, IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 69, no. 4, pp. 1571-1582, 2022.

 [5] H. Cai, Z. Bian, Z. Fan, B. Liu and L. Naviner, Commodity Bit-Cell Sponsored MRAM Interaction Design for Binary Neural Network, in IEEE Transactions on Electron Devices, vol. 69, no. 4, pp. 1721-1726, 2022.

 [6] B. Liu, H. Cai, Z. Zhang, X. Ding, R. Zhang, Y. Gong, Z. Wang, W. Ge and J. Yang, Approximate Tensor Multiplication Circuit Architecture for Error-tolerant CNN-based Keywords Speech Recognition, IEEE Design & Test, 2022, Early Access.

 [7] B. Liu, X. Ding, H. Cai, W. Zhu, Z. Wang, J. Yang, Precision Adaptive MFCC Based on R2SDF-FFT and Approximate Computing for Low-Power Speech Keywords Recognition, IEEE Circuits and Systems Magazine, vol. 21, no. 4, pp. 24-39, Fourthquarter 2021. (Feature Paper)

 [8] B. Liu, Z. Zhang, H. Cai, R. Zhang, Z. Wang and J. Yang, Self-Compensation Tensor Multiplication Unit for Adaptive Approximate Computing in Low-power CNN Processing, SCIENCE CHINA Information Sciences, vol. 65, no. 4, pp. 149403, 2022.

 [9] H. Cai, B. Liu, J. T. Chen, L. A. B. Naviner, Y. Zhou, Z. Wang and J. Yang, 'A survey of in-spin transfer torque MRAM computing,' SCIENCE CHINA Information Sciences, vol. 64, no. 6, pp. 160402, 2021.

 [10] B. Liu, H. Cai, Z. Wang, Y. Sun, Z. Shen, W. Zhu, Y. Li, Y. Gong, W. Ge, J. Yang, L. Shi, 'A 22nm, 10.8 μW/15.1 μW Dual Computing Modes High Power-Performance-Area Efficiency Domained Background Noise Aware Keyword- Spotting Processor,' IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 67, no. 12, pp. 4733-4746, 2020.

 [11] B. Liu, Z. Wang, S. Guo, H. Yu, Y. Gong, J. Yang, L. Shi, “An energy-efficient voice activity detector using deep neural networks and approximate computing”, Microelectronics Journal, vol. 87, pp. 12-21, 2019.

 [12] Y. Gong, B. Liu, W. Ge, L. Shi, “ARA: Cross-Layer approximate computing framework based reconfigurable architecture for CNNs”, Microelectronics Journal, vol. 87, pp. 33-44, 2019.


国际会议:

 [1] B. Liu, H. Cai, X. Zhang, H. Wu, A. Xue, Z. Zhang, Z. Wang and J. Yang, “A Target-Separable BWN Inspired Speech Recognition Processor with Low-power Precision-adaptive Approximate Computing,” IEEE/ACM Design, Automation and Test in Europe Conference 2022 (DATE 2022), pp. 196-201, 2022.

 [2] J. Chen, H. Cai, B. Liu and J. Yang, Triple-Skipping Near-MRAM Computing Framework for AIoT Era, IEEE/ACM Design, Automation and Test in Europe Conference 2022 (DATE 2022), pp. 1401-1406, 2022.

 [3] B. Liu, Z. Shen, L. Huang, Y. Gong, Z. Zhang and H. Cai, “A 1D-CRNN Inspired Reconfigurable Processor for Noise-robust Low-power Keywords Recognition,” IEEE/ACM Design, Automation and Test in Europe Conference 2021 (DATE 2021), pp. 495-500, 2021.

 [4] H. Wu, X. Zhang, X. Ding, Z. Wang, A. Xue, Y. Gong, B. Liu, “An Always-on Ultra-Low Power Speaker Verification Accelerator based on Binary Weighted Neural Network with System Co-optimization,” 2021 IEEE 14th International Conference on ASIC (ASICON 2021), pp. 1-4, 2021.

 [5] R. Zhang, X. Wang, Z. Wang, A. Xue, H. Yang, Y. Gong, B. Liu, Mutual Error Compensation based Area and Power efficient Approximate Multiplier, 2021 IEEE 14th International Conference on ASIC (ASICON 2021), 2021.

 [6] Z. Zhang, H. Yang, X. Zhang, X. Ding, X. Wang, Y. Gong, B. Liu, Low-Power Keyword Recognition Feature Extraction Circuit based on SRMFCC and Shared Multiplier for High Noise Background, 2021 IEEE 14th International Conference on ASIC (ASICON 2021), 2021.

 [7] L. Guo, P. Lin, L. Guo, B. Liu, Implementation of a CRNN-based low-power keyword recognition system on FPGA, 2021 IEEE 14th International Conference on ASIC (ASICON 2021), 2021.

 [8] B. Liu, H. Cai, Y. Gong, W. Zhu, Y. Li, W. Ge, Z. Wang, “Binarized Weight Neural-network Inspired Ultra-low Power Speech Recognition Processor with Time-domain based Digital-analog Mixed Approximate Computing,” IEEE International Symposium on Circuits and Systems (ISCAS 2020), pp. 1-5, 2020.

 [9] B. Liu, Y. Sun, H. Cai, Z. Shen, Y. Gong, L. Huang and Z. Wang, “An Ultra-low Power Keyword-Spotting Accelerator Using Circuit-Architecture-System Co-design and Self-adaptive Approximate Computing Based BWN,” ACM 30th Great Lakes Symposium on VLSI (GLSVLSI 2020), pp. 193-198, 2020.

 [10] B. Liu, Y. Li, L. Huang, H. Cai, W. Zhu, S. Guo, Y. Gong, “A Background Noise Self-adaptive VAD Using SNR Prediction Based Precision Dynamic Reconfigurable Approximate Computing,” ACM 30th Great Lakes Symposium on VLSI (GLSVLSI 2020), pp. 271-275, 2020.

 [11] Y. Li, X. Ding, H. Yang, X. Zhang, Y. Gong, B. Liu, “A 681 GOPS/W~3.59 TOPS/W CNN Accelerator Based on Novel Data Flow Scheduling Scheme,” IEEE 15th International Conference on Solid-State and Integrated Circuit Technology, 2020.

 [12] L. Huang, Z. Zhang, H. Yang, Y. Sun, Y. Gong, Wei Ge, B. Liu, “Low Power Keyword Recognition Accelerator based on Approximate Calculation of Deep-Shift Neural Network,” IEEE 15th International Conference on Solid-State and Integrated Circuit Technology, 2020.

 [13] W. Zhu, Y. Sun, Z. Shen, H. Yang, Y. Gong and B. Liu, “Design of High Performance RNN Accelerator Based on Network Compression,” 2020 IEEE International Conference on Circuits and Systems, pp. 6-10, 2020.

 [14] Y. Gong, B. Liu, W. Ge, L. Shi, “RNA: Reconfigurable LSTM Accelerator with Near Data Approximate Processing,” IEEE 18th International Conference on Field-Programmable Technology (FPT 2019), pp. 311-314, 2019.


已授权美国专利:

 B. Liu, Y. Gong, W. Ge, J. Yang, L. Shi, Multiply-Accumulate Calculation Method and Circuit Suitable for Neural Network, 授权时间:2021.04.20,专利号:US10984313B2


指导学生获得各类竞赛奖项20余项包括

 [1]2021建行杯第七届中国国际“互联网+”大学生创新创业大赛,国赛银奖,省赛一等奖第一名;

 [2]2021全国大学生嵌入式芯片与系统设计竞赛全国总决赛一等奖(学生:薛安丰,王学涛,吴海舸);

 [3]2021全国大学生集成电路创新创业大赛全国总决赛一等奖(学生:王梓羽,张人元,钱俊逸);

 [4]2021第十六届中国研究生电子设计竞赛华东赛区一等奖(学生:王梓羽,张人元,钱俊逸);

 [5]2021全国大学生集成电路创新创业大赛华东赛区三等奖(学生:张子龙,杨海川,薛安丰)

 [6]2020年“绍兴九天杯”首届集成电路产业设计大赛总决赛二等奖;(分组赛第一,全国总决赛第二)

 [7]2020年首届中国电子信息行业创新创业大赛总决赛优秀奖;

 [8]2020年全国大学生集成电路创新创业大赛全国总决赛一等奖(学生:朱文涛,邹艳勤,孙煜昊)

 [9]2020年全国大学生集成电路创新创业大赛华东分赛区决赛三等奖(学生:刘明冲,张轩,丁小灵)

 [10]2020年“华为杯”第三届中国研究生创“芯”大赛总决赛二等奖(学生:朱文涛,邹艳勤,孙煜昊)

 [11]2020年第二届集成电路EDA设计精英挑战赛三等奖×2(博士生组,学生:龚宇,张轩,丁小灵)(硕士生组,学生:张子龙,杨海川,孙煜昊)

 [12]2019年全国大学生“互联网+”创新大赛全国总决赛二等奖(学生:朱文涛,邹艳勤)

 [13]2019年全国大学生集成电路创新创业大赛全国总决赛二等奖(学生:李焱,孙煜昊,朱文涛)

 [14]2019年全国大学生集成电路创新创业大赛华东分赛区决赛二等奖(学生:于华振,范虎,刘波)

 [15]2019年全国大学生集成电路创新创业大赛华东分赛区决赛三等奖(学生:杨晶,向丽苹)

 [16]2018年全国大学生FPGA创新设计邀请赛一等奖(学生:于华振,刘波,范虎)

 [17]2018年第十三届中国研究生电子设计竞赛团队二等奖(学生:陈爽,王俊,王伟,姜桂泉,王福安)

 [18]2018年中国研究生创新实践系列大赛“华为杯”全国总决赛二等奖(学生:夏梦雯,范虎,于华振)

 [19]2018年全国大学生集成电路创新创业大赛华东分赛区决赛三等奖(学生:于华振,杨晶,郭世晟)

 [20]2017年全国大学生FPGA创新设计邀请赛企业特别奖(学生:于华振,杨晶,刘波)

 [21]2017年第七届全国大学生集成电路设计大赛总决赛一等奖(学生:秦海,夏梦雯,郑梦瑶)

 [22]2017年全国大学生集成电路创新创业大赛全国总决赛三等奖(学生:朱智洋,陈壮,阮星)