司鑫职务:
单位:国家ASIC工程中心
电话:
出生年月:1995-03-23
邮箱:xinsi@seu.edu.cn
学历:博士研究生
地址:逸夫科技馆5楼
职称:副教授
个人简介 东南大学紫金青年学者,博士生导师,在集成电路领域核心会议/期刊累计共发表存算方向相关论文40余篇,包含10篇有着“芯片奥林匹克”之称的顶会论文ISSCC、7篇集成电路顶刊论文JSSC和2篇Nature Electronics;获授权美国专利3项;同时多次受邀给予讲座报告,包含IEEE ASICON, IEEE ICTA,2020 FICC等。
教育经历 2012.09-2016.07 电子科技大学集成电路设计与集成系统专业本科; 2016.09-2017.06 电子科技大学微电子学与固体电子学专业硕士研究生; 2017.09-2020.12 电子科技大学微电子学与固体电子学专业博士研究生; 2017.08-2019.09 台湾清华大学电机工程学系联合培养博士研究生。 工作经历 2021.07-至今 东南大学集成电路学院 讲授课程 本科生课程:《高能效集成电路设计》(研讨) 研究生课程:《专用集成电路设计》 教学研究 出版物 [1] Xin Si, et.al., A Local Computing Cell and 6T SRAM-Based Computing-in-Memory Macro with 8-b MAC Operation for Edge AI Chips, IEEE Journal of Solid-State Circuits (JSSC), Sep. 2021; [2] Jian-Wei Su, Xin Si, et. al., Two-Way Transpose Multibit 6T SRAM Computing-in-Memory Macro for Inference-Training AI Eged Chips, IEEE Journal of Solid-State Circuits (JSSC), 2021; [3] Xin Si, et.al.,A Twin-8T SRAM Computation-in-Memory Unit-Macro for Multibit CNN-Based AI Edge Processors , IEEE Journal of Solid-State Circuits (JSSC),Jan., 2020; [4] Xin Si, et.al.,A Dual-Split 6T SRAM-based Computing-in-Memory unit-macro with Fully Parallel Product-sum operation for Binarized DNN Edge Processors, IEEE Transactions on Circuits and Systems I: Regular Papers,(TCAS-I), Nov. 2019; Conferences (部分代表会议论文): [1] Xin Si,Yung-Ning Tu, Wei-Hsing Huang, Jian-Wei Su, Pei-Jung Lu, Jing-Hong Wang, Ta-Wei Liu, Ssu-Yen Wu, Ruhui Liu, Yen-Chi Chou,Qiang Li, Meng-Fan Chang, A 28nm 64Kb 6T SRAM Computing-in-Memory Macro with 9-bit MAC Operation for AI Edge Chips, International Solid-State Circuits Conference (ISSCC), 2020; [2] Xin Si, Jia-Jing Chen, Yung-Ning Tu, Wei-Hsing Huang, Jing-Hong Wang, Yen-Cheng Chiu, Wei-Chen Wei, Ssu-Yen Wu, Xiaoyu Sun, Rui Liiu, Shimeng Yu, Ren-Shuo Liu, Chih-Cheng Hsieh, Kea-Tiong Tang,Qiang, Li, Meng-Fan Chang,A Twin-8T SRAM Computation-in-Memory Macro for Multiple-bits CNN-Based Machine Learning, International Solid-State Circuits Conference (ISSCC), 2019; [3] Yuxin Zhang, Sitao Zeng, Zhiguo Zhu, Zhaolong Qin, Chen Wang, Jingjing Li, Sanfeng Zhang, Yajuan He, Chunmeng Dou, Xin Si*, Meng-Fan Chang, Qiang Li, A 40nm 1Mb 35.6 TOPS/W MLC NOR-Flash Based Computation-in-Memory Structure for Machine Learning, 2021 IEEE International Symposium on Circuits and Systems (ISCAS)(* Corresponding Author); [4] Sitao Zeng, Yuxin Zhang,Zhiguo Zhu, Zhaolong Qin, Chunmeng Dou, Xin Si*, Qiang Li,MLFlash-CIM: Embedded Multi-Level NOR-Flash Cell based Computing in Memory Architecture for Edge AI Devices, 2021 IEEE 3rd International Conference on Artificial Intelligence Circuits and Systems (AICAS)(* Corresponding Author); Details please refer to: https://ieeexplore.ieee.org/author/37086351200 https://scholar.google.com/citations?user=dwRonY8AAAAJ&hl=zh-CN 研究领域或方向 存内计算,存储器,混合信号,人工智能AI芯片设计 研究项目 研究成果 学术兼职 目前担任IEEE VLSI-TSA和 MCSoC等会议TPC,担任IEEE JSSC, TCAS-I, TCAS-II, TVLSI, ISCAS, TED, APCCAS, 半导体学报和中国科学的分会主席或审稿人。 团队介绍 招生情况 毕业生介绍 |