王翕职务:副教授
单位:
电话:
出生年月:
邮箱:xi.wang@seu.edu.cn
学历:博士
地址:国家集成电路自动化设计技术创新中心401
职称:副教授
个人简介 王翕博士,现东南大学集成电路学院副教授,德克萨斯理工大学计算机学院客座研究科学家 (Adjunct Research Scientist), 研究方向专注于计算机体系结构和新一代EDA工具。于2020年在美国德克萨斯理工大学取得计算机科学博士学位, 之后跟随图灵奖得主RISC-V开源架构创始人,David A. Patterson 院士,在清华大学任博士后研究员。 拥有超过9年RISC-V体系结构设计经验,含括处理器设计,新一代EDA工具,大语言模型,高性能计算,并行计算,编译器,二进制转译,敏捷开发工具链等领域的科研工作。参与/主持多项由美国国家自然科学基金,美国国防部,美国能源部,深圳市科创委, RISC-V国际基金会,英特尔,亚马逊,大众中国资助的科研项目,项目经费累计1.55亿人民币。全球首创基于AI大语言模型的处理器芯片自动化设计和验证平台ChatCPU。科研成果多次在 DAC, IPDPS, HPDC, ICPP, JSSC, TC等国际顶级会议和期刊上累计发表20篇,其中一作/通讯12篇。并荣获IPDPS 2021年度最佳论文奖,ISSCC 2023 Code-a-Chip芯片设计奖第一名,CSAW 2023年度国际AI硬件攻击挑战赛冠军等国际学术会议奖项。多项科研成果被美国西北太平洋国家实验室 (PNNL), 劳伦斯伯克利国家实验室(LBNL), RISC-V国际基金会, 美光科技, 大众, 英特尔, 美光等机构和企业采纳使用。
教育经历
- 2016 - 2020:美国德克萨斯理工大学 (Texas Tech University),计算机科学(博士) - 2014 - 2016:美国德克萨斯理工大学 (Texas Tech University),计算机科学(硕士)
工作经历 2024.4 - 至今: 东南大学,集成电路学院,副教授 2024.1 - 2024.4:国家集成电路自动化设计技术创新中心,大模型项目组,项目主管 2023.6 - 2024.1:清华大学,深圳国际研究生院,项目研究员 2021.5 - 2023.5:清华大学,深圳国际研究生院,博士后研究员 2018.5 - 2018.8:美国西北太平洋国家实验室(Pacific Northwest National Laboratory),High-Performance Computing Department,博士实习(Ph.D. Intern) 2017.5 - 2017.8:美国阿贡国家实验室(Argonne National Laboratory),Mathematics and Computer Science Division ,科研助理(Research Aide) 2016.5 - 2016.8:美光科技(MicronTechnology, Inc.),Advanced Memory System Group,编译器工程师(Compiler Engineer)
研究领域或方向 研究专注于计算机体系结构,新一代EDA工具,处理器设计,大语言模型,高性能计算,并行计算,编译器,二进制转译,敏捷开发工具链等方向。
研究成果
近5年发表论文( * 通讯作者) Ke Xu, Jialin Sun, Yuchen Hu, Xinwei Fang, Weiwei Shan, Xi Wang* and Zhe Jiang, MEIC: Re-thinking RTL Debug Automation using LLMs, IEEE ICCAD 2024. Xi Wang, Gwok-Waa Wan, Sam-Zaak Wong, Layton Zhang, Tianyang Liu, Qi Tian and Jianmin Ye, ChatCPU: An Agile CPU Design & Verification Platform with LLM, IEEE DAC, Best Paper Award Nominee (5/1456), 2024 Gwok-Waa Wan, Sam-Zaak Wong, Xi Wang*, Jailbreaking Pre-trained Large Language Models Towards Hardware Vulnerability Insertion Ability, ACM/IEEE GLVLSI 2024. Tianyang Liu, Qi Tian, Jianmin Ye, LikTung Fu, Shengchu Su, Junyan Li, Gwok-Waa Wan, Layton Zhang, Sam-Zaak Wong, Xi Wang*, and Jun Yang,ChatChisel: Enabling Agile Hardware Design with Large Language Models,ISEDA 2024. Yuxuan Du, Zhengguo Shen, Junyi Qian, Chengjun Wu, Weiwei Shan, and Xi Wang*, DSC-TRCP: Dynamically Self-calibrating Tunable Replica Critical Paths Based Timing Monitoring for Variation Resilient Circuits, IEEE JSSC, 2024. Cai Li, Haochang Zhi, Kaiyue Yang, Junyi Qian, Zhihao Yan, Lixuan Zhu, Chao Chen, Weiwei Shan, and Xi Wang*, A 0.61μW Fully-Integrated Keyword-Spotting ASIC with Real-Point Serial FFT-Based MFCC and Temporal Depthwise Separable CNN, IEEE JSSC, 2023. Xi Wang, John D. Leidel, Brody Williams, Alan Ehret, Miguel Mark, Michel Kinsy, and Yong Chen, xBGAS: A Global Address Space Extension on RISC-V for High Performance Computing, IEEE Conference on International Parallel & Distributed Processing Symposium (IPDPS), Best Paper Award (1/462), 2021. Xi Wang*, Antonino Tumeo, John D. Leidel, Jie Li and Yong Chen, HAM: Hotspot-Aware Manager for Improving Communications with 3D-Stacked Memory, IEEE Transactions on Computers (TC). Zach Hansen, Brody Williams, John D. Leidel, Xi Wang, Yong Chen, DMM-GAPBS: Adapting the GAP Benchmark Suite to a Distributed Memory Model, IEEE High Performance Extreme Computing Conference (HPEC), 2021. Brody Williams, John D. Leidel, Xi Wang, and Yong Chen, CircusTent: A Benchmark Suite for Atomic Memory Operations, ACM International Symposium on Memory Systems (MEMSYS), 2020. John D. Leidel, Xi Wang*, Brody Williams, and Yong Chen, Toward a Microarchitecture for Efficient Execution of Irregular Applications, ACM Transactions on Parallel Computing (TOPC), 2020. Xi Wang, John D. Leidel, Brody Williams, and Yong Chen, PAC: Paged Adaptive Coalescer for 3D-stacked memory, ACM High-Performance Parallel and Distributed Computing (HPDC), 2020. Xi Wang, Brody Williams, John Leidel, et al., Remote Atomic Extension (RAE) for Scalable High Performance Computing. IEEE Design Automation Conference (DAC), 2020. Xi Wang, Antonino Tumeo, John D. Leidel, Jie Li, and Yong Chen, MAC: Memory Access Coalescer for 3D-Stacked Memory, ACM International Conference on Parallel Processing (ICPP), 2019. Jie Li, Xi Wang, Antonino Tumeo, Brody Williams, John D. Leidel, and Yong Chen, PIMS: A Lightweight Processing-in-Memory Accelerator for Stencil Computations, ACM International Symposium on Memory Systems (MEMSYS), 2019. Xi Wang, John D. Leidel, Yong Chen, Memory Coalescing for Hybrid Memory Cube, ACM International Conference on Parallel Processing (ICPP), 2018.
IEEE DAC 2024 Best Paper Award Nominee (5/1456) IEEE VLSI 2024 “Code-a-Chip” Award, First Prize CSAW 2023 International AI Hardware Attack Challenge, First Prize IEEE ISSCC 2023 “Code-a-Chip” Award, First Prize IEEE Conference on IPDPS 2021 Best Paper Award (1/462) Best Research Poster Award of NSF CAC (Cloud and Autonomic Computing) in 2020 Helen DeVitt Jones Excellence in Graduate Teaching Award of Texas Tech University in 2018 Travel Grant for attending ACM/IEEE SC17 (Super Computing 2017) in Denver 2017 Travel Grant for attending ACM/IEEE SC16 (Super Computing 2016) in Salt Lake City 2016
团队介绍 我们的团队名称为GEAR( Group of Emerging Architecture Research),专注于计算机体系结构和EDA方向的前沿探索,致力于推动全球新一代EDA技术的发展,应对如今领域定制架构设计和日益繁复的系统设计挑战,以软硬协同的方式开展端到端的全栈式芯片设计研究。
Every cog in the GEAR counts! & There is no loser in a winning team! 我们关注每一位团队成员的未来发展,以Top-Down的教育方式辅助全栈式的芯片设计流程学习,鼓励以兴趣为导向的开放研究模式。同时,我们也根据团队成员们的个人发展规划,平衡科研探索(Research)和工程实现(Development),致力于培养IC行业的六边形战士。
招生情况
课题组常年招收研究生及本科生,欢迎对计算机体系结构、RISC-V开源架构、CPU设计、EDA工具链、大语言模型、人工智能、私密计算、编译器、高性能计算、二进制转换、和并行计算等方向感兴趣的同学加入,详情请通过邮件沟通咨询(xi.wang@seu.edu.cn)。
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